Fill and Sign the Library Project Proposal Sample PDF Form

TM Component Portability Infrastructure Building Waveform-Ready™ SATCOMTerminals Jim Kulp, Consulting Software Architect © 2008 Mercury Computer Systems, Inc. CPI Provides Waveform Portability
SCA Compliance
• RTOS • CORBA ORB • Core framework Software Communications Architecture TM FPGA Code Portability • OCP-based Interfaces • FPGA development environment • SCA CF agnostic FPGA Component Implementations CF::ApplicationFactory Waveform Applications SCA CF Client CF::Application Core Framework Real-Time Operating System (RTOS) Device Drivers CORBA ORB AssemblyController CF::ExecutableDevice Generic Proxy FPGA Container GPP Environment Waveform Component Instance (VHDL) FPGA Environment 2 © 2008Mercury Computer Systems, Inc. CPI Enables Waveform-Ready Platforms TM • Built-in control to ensure independence from waveform  Complete control plane functionality built in to CPI  SCA compatibility • Built-in data transport mechanisms  Supporting high-performance switch fabrics and back planes • Built-in memory access  Multiple FPGA memory technologies, DMA • Open interfaces to plug-in waveform components  OCP for FPGAs, C/C++ for GPP and DSPs • Supports heterogeneous platforms  Supporting GPP, FPGA, DSPs today CPI provides control and data plane infrastructure necessary to plug in 3rd-party waveform components 3 © 2008Mercury Computer Systems, Inc. CPI Components Execute in Containers TM Simple Receiver Tuner RF to IF A/D Digital Downconverter Demodulator Decoder Output Component implementations in Containers FPGA component … Digital Downconverter FPGA Container Components talk to their containers. Important interface for portability of components. APIs used by component authors. GPP components Demodulator Decoder … PowerPC+CORBA+POSIX Container Containers talk to containers. Important interface for interoperability/plug&play of containers (e.g. boards). Protocols/networks/busses. Communication between components, conveyed by their containers 4 © 2008Mercury Computer Systems, Inc. CPI: Component Portability Infrastructure TM • Infrastructure to support component-based applications  Control plane and data plane  FPGA IP and software/middleware/drivers • Targeting heterogeneous system challenges     Setup/control/management and runtime FPGA-centered Peer model with GPP and DSP software Reuse/portability within and across technologies • Driven by high-bandwidth, data-link applications  Applications are waveforms  Waveforms are assemblies of connected components  Most components will be in FPGAs • Driven by DoD communications requirements  Open standards and interfaces  SDR compatibility  Waveform portability • DoD owns/provides waveforms to primes • Upper limit of component granularity 5 © 2008Mercury Computer Systems, Inc. CPI Supports Multiple Component Types Waveform Components TM Used to model applications/waveforms Common interface definitions (IDL) Same modeling tools (e.g. Zeligsoft CE) -orCORBA Interfaces GPP Components OO Languages CORBA POSIX SCA 2.x SHP Components -orDSP Components DSP RISC (small mem) Cell SPU Microcontroller 6 Simpler Interface FPGA Components FPGA ASIC © 2008Mercury Computer Systems, Inc. CPI Components Interoperate with SCA TM • CF:: Resource interface is fixed • Port interfaces use constrained IDL • Request/response messages use derived “struct” from a subset of IDL  Component source code fills/uses struct, sends/received messages  No “stub/skeleton” generated code required or desired at this level  Simple arrays work fine (fixed or variable) • Configuration properties use a derived “struct” from property definition, using same layout rules 7 © 2008Mercury Computer Systems, Inc. CPI Component Implementations SCA View CF::ApplicationFactory TM SCA CF Client runTest, start, stop, configure, query allocateCapacity, load, execute CF::Application runTest, start, stop, configure, query AssemblyController runTest, start, stop, configure, query CF::ExecutableDevice Generic Proxy Creates: … Typically process-collocated with logical device Load/create (not CORBA) Control/config (not CORBA) GPP Environment Container Loads, creates, controls: Component Instance … Target Processor 8 © 2008Mercury Computer Systems, Inc. CPI Component Implementations SCA Metadata View Assembly for Waveform (SAD) DDC Component ddc.spd Demod Component Decode Component Each component references its SPD SPD for DDC Component Descriptor: ddc.scd If this implementation is Implementation1 chosen, must run ddc.dll on For GPP DDC some GPP device Processor: GPP File: ddc.dll Implementation2 For FPGA Worker File: ddc.fpga Processor: FPGA 9 TM SCD for DDC interface for all implementations IDL for “specific interface” IDL for ports If this implementation is chosen, only a generic FPGA proxy will run inside ExecutableDevice (on same GPP) and ddc.fpga will run on some physical FPGA device © 2008Mercury Computer Systems, Inc. CPI Component Interoperability with GPP TM • Adaptation to GPP ORBs at ORB transport level     ORB transport knows what to do directly at GPP side --- or --Container may create CORBA/GIOP messages directly Choice is up to platform integrator No such adaptation is used or needed unless CPI and GPP component implementations are connected RPL component DDC FPGA Container GPP components Demodulator Decoder PowerPC+CORBA+POSIX Container • Generic proxies, synthesized by SCA logical devices, • 10 represent the CF:: Resource interface to world Proxies acting as “adapters” can do customized translation if “interception overhead” is acceptable © 2008Mercury Computer Systems, Inc. FPGA Components TM • All interfaces defined using OCP     Open standard for how “IP cores” are connected Independent of VHDL vs. Verilog, interface mappings for both Range of performance options Increasing acceptance by users and producers of FPGAs, SoC • Management interface  Initialize/start/stop/release/test on one OCP “thread”  Configure read/write on second OCP “thread” • Inter-component interface  Burst read/write transactions on OCP-port • One OCP port per IDL port per direction  Implementation chooses master or slave role  Implementation chooses FIFO or random access style • Local interfaces  Clocks and local memory access (several styles) 11 © 2008Mercury Computer Systems, Inc. CPI Defines OCP Profiles TM • Component interface – collection of OCP profiles  Fully compliant with OCP 2.2  Signal definition and some semantic information  Used for control, data, and memory interface patterns 12 © 2008Mercury Computer Systems, Inc. Example: 2 FPGA Components in a Container 1 and 2 : Worker Control Interface (WCI) 3 and 4 : Worker Stream Interface (WSI) 5 and 6 : Worker Message Interface (WMI) 7 : Worker Memory Interface (WMemI) 13 © 2008Mercury Computer Systems, Inc. TM CPI Benefits TM • Full consistency with SCA's component model • • • • 14  Consistent with concept of IP cores Full interoperability with CORBA  Without introducing any CORBA into FPGA IP Methodology using a mature, SoC/ASIC-tested approach  Consistent with best practices of how IP cores are normally developed  Integration (control and data) provided behind the scenes Minimal latency and footprint for control and data plan  Full integration at SCA component level Optimal performance for connections  Inside FPGA  Between FPGAs on board (parallel wires)  FPGAs across backplane (serial wires) © 2008Mercury Computer Systems, Inc. CPI Benefits (continued) TM • Open and published specification for waveform interfaces • • • 15  Anyone can implement/wrap/support it – no vendor lock-in Clear separation of control and data plane CPI based on high-performance FPGA Developer’s Kit (FDK)  Shipping for 5 years with lots of maturity and experience  State-of-the-art performance from pair of FPGAs in a smart missile to 100 FPGAs across mesh-connected backplane IP kit includes  Support for component environment AND  Support for hardware elements surrounding FPGA such as transceivers, memories, fabrics, and DMA © 2008Mercury Computer Systems, Inc.