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good afternoon everyone I'm IRA Feldman I'm the executive director of MEP tech and I would like to welcome you to the semiconductor industry speaker series event that we co-host with I'm apps wanted to do a little housekeeping first reminder the restroom is out bath past behind the stairs there are copies of the MEP tech report here for you the next issue will be going out electronically next week and you will receive MEP tech members will receive printed copies in the mail about week later so in about two weeks you should find that in your postal mailbox and then for people who are interested we're also partnering with the international wafer level packaging the conference iw LPC October 22nd to 24th here in San Jose so there's a flyer on that and as a committee member there I encourage you to attend because there are a lot of great technical presentations and it's really outstanding keynotes slated for that program wanted to take a minute and sort of remember back I was a set a note prior to today's luncheon from Betty Cooper who sends her regards eighteen years ago we were about to hold the state of the art luncheon we'll talk about Jim Walker on September 12th so September 11th with the disaster was also a very logistical mess I hear that Jeff our speaker was caught up in it and he might comment on that but what was really important from her reminiscence is that they originally thought about canceling the event on September 12th but actually attendance was very strong and the energy level was very high so I think really the important thing is we remember the people who perished on September 11th is really to remember that the terrorists don't win unless we give up hope or cave to terror so as we remember the people who pass we should also express gratitude and remember and thank the people who given their lives in service and their energies and service to us before September 11th and since that time to keep us safe and ensure our democracy so so just some thoughts to think about today moving moving forward our next luncheon is scheduled on October 16th Julia Goldstein is an author who will talk about the environmental impact of the semiconductor packaging supply chain we may also have a co-presenter for that so stay tuned we are still working out the details of our November 13th luncheon but we will have one and then on December 11th Jan vardaman will be back for the state of the industry presentation which is always very enlightening and always her comments and her insights are very entertaining and important so December 11th and then would like to remind everybody that December 12th here Thursday will be the known good die workshop it will be the 20th annual event we are working on the program that will be up before the end of the month registration will open and we encourage people to participate in that and if people are interested in presenting or exhibiting please let me know or let Betty know we'd love to have you so it is my pleasure to introduce Jeff demin he is a senior lead scientist from Booz Allen Hamilton where he's specializing on managing R&D programs and heterogeneous integration and semiconductor technology for DARPA and other government clients he was previously director of OEM marketing assets chip PAC he's worked at s-sarah and it was editors at both advanced packaging and solid-state technology magazines and he's been a longtime board member of MEP Tech since 2000 so with I'd like to welcome Jeff okay I think I'm all set here thanks IRA for the introduction and yes it was 18 years ago on 9/11 I was living in New Hampshire at the time I was working for advanced packaging magazine with Penn well in Nashua New Hampshire and flew out of Boston that morning headed for California for this so that's exactly what one of the planes that was hijacked was doing and for a while my wife didn't know what plane I was on a little bit harder to track down those details in those days so that was a stressful time for her I did they landed all the planes in the air at the time we landed in Des Moines I was fortunate to rent to be able to rent a car and drive back to New Hampshire found the family the next day but yeah obviously a stressful time you know quite an experience for me but still you know fortunate compared to a lot of people so that's helped me to remember not to sweat the small stuff so I hope that's something that that everyone else can take away as well so without further ado maybe just say explain Booz Allen Hamilton not especially well-known company but it's a quite a large government contractor so large parts of the government run mostly on contractors so I work for Booz Allen Hamilton contracted out to DARPA and other agencies the staff at DARPA the actual employee count at DARPA is about a hundred people so it's pretty small for an agency managing about three and a half billion dollars every years but the contractors provide the continuity because DARPA program managers cycle through every few years and we're also available to keep working when the government shuts down if that ever happens and so it's a quite an interesting spot to be obviously leading-edge research and you know something happy to be with Booz Allen Hamilton and and helping contribute to DARPA DARPA work so here so what we'll be talking about here today talk of a past present future of government investment in heterogeneous integration we were all pretty familiar with the topic probably by now and but there's been a lot going on for many years at DARPA and other places in the government and I'll talk about some of that I'm involved in some programs currently chips being the primary one and there's a larger umbrella effort called the electronics Reese Electronics resurgence initiative that's run out of DARPA z-- MTO office Microsystems technology office which is you know over a billion dollars invested in in bootstrapping up the domestic electronics industry and then the future there's more security issues than ever there's a lot being done to address that it's a very large effort called min SEC you can read the full name there you can see that you know no shortage of acronyms here in the government world but that's a large umbrella effort going on then probably the most recent thing of note this program called ship proposals were due last month it's a quite quite a large investment being made to look into setting up domestic capability for leading-edge interposer integration that's no new technology but all the pieces aren't there for the government to use theirs that's kind of a you know become very clear the government can see all these capabilities out there but they're either offshore or they they don't want to deal with small volumes I can't quite meet security requirements so getting the pieces in place of the u.s. can access the most leading-edge technology and that's that's what that one's about so we'll get to that so past will start in the past so you know step step one here heterogeneous integration is putting it together different materials so why do you want different materials here's a table that shows that with some basic metrics for these different types of semiconductor materials silicon gallium arsenide indium phosphide gallium nitride and they all have good and bad things by different metrics gallium arsenide and indium phosphide very high carrier velocity so they're they're good in that regard some have better thermal conductivity than others just kind of different different features and silicon especially has proliferated because of the ability to process it you know to shrink transistors having a stable oxide things like that make it a a you know it's been an ideal material for decades to forge ahead in the semiconductor world gallium arsenide high performance material that has some definite advantage and the government invested DARPA invested something like six hundred million dollars over the years in gallium arsenide technology that's becoming more and more of a mainstream material you know and our front ends and things like that and even phosphide gallium nitride a lot of work more recently in that but you know large investments in these materials so that's why we need you know need this this diversity of materials just one interesting tidbit here indium phosphide let's see where's the one of the programs at DARPA called terahertz electronics actually had the fastest transistor to that date and they actually got a Guinness World Record certification for doing that so it was kind of a nifty thing DARPA is not shy about getting PR like that so that was one of the accomplishments in these different programs over the years I'll be talking more about things on the right there the CMOS cosmos dahi and programs that followed to integrate all these different devices so I think a lot of us have also seen this where people predicting the end of Moore's law so getting really really hard to keep things moving forward with with silt with well you know finer nodes advancing the silicon technology and even Gordon Moore himself every ten years has updated his his protection there's it's always about ten years out that Moore's law runs out of gas so he was up there three times not quite sure what this guy was thinking here twenty six hundred when Moore's law will run out of steam I don't know what that was but you know it's incumbent technologies that tend to go on longer than anyone expects and that's been true with Moore's law there's still debate as to what you know when it really will run out of gas however if you read carefully you know the 1965 paper by Gordon Moore actually includes heterogeneous integration so you could say Moore's law will continue to be a heterogeneous integration there's the verbiage he used where he said it would be you know more economical to build large systems out of smaller functions separately packaged and interconnected that's heterogeneous integration so even over 50 years ago that was seen and that's kind of the Forgotten part of Moore's law so that's that's been a kind of a driving concept behind a lot of the work and the government on heterogeneous integration so why heterogeneous integration most people think of putting you know the upper left there best-of-breed technology you get to pick and choose the type of device to put together to get exactly what function you need this is a canonical transceiver device there with color-coded the different types of devices silicon indium phosphide gallium nitride and even MEMS devices the different pieces that go together to make a transceivers that's a representative application for heterogeneous integration in the government I mean apart from that being able to mix and match the best type of devices it's can't be higher density conventional integration of different device types even a you know wafers wait for scale phased already even and then having a modular design approach and that I'll talk about that want to talk about chips we're having different types of devices putting the pieces together changes how you think about it rather than having to deal with big pieces of silicon and do that you can design things differently if you start thinking about it differently so DARPA has been involved in this for a long time you know it's over 20-25 years many different programs over the years sometimes with these specialized applications like a focal-plane array stacks 3d I see in the last day or maybe 10 years has been more work on what people picture is conventional broadly applicable heterogeneous integration and I'll started back with the ACM program back in the early 90s and that that was when I was working at n ship getting funded by the government so I was on that side of the table at that time and that's a version of me from the previous millennium when I was working on that so I recently did update my photo on LinkedIn some people were noting how old it was there it is anyway so here's that that device I were talking about we're putting together these different pieces can really really you know have performance it's just not possible any other way and we'll have a few examples of that in the dahi program so that was kind of a guiding concept of what to how to approach this so DARPA sat down looked at this whole space of those you know and these axes the number of transistors that can be integrated you know on the horizontal axis and then a figure of Merit and the vertical axis and different materials show up in different spots with different types of you know devices hem to HB T's mesfets different things silicon of course is on the far right just through the ability to integrate billions or trillions of as we saw it hot chips recently a trillion transistor chip so just the integration the ability just scale is just amazing for for silicon and the other axis gallium nitride and other devices have much better performance by this figure of Merit and the goal of these programs cosmos and dahi was to push everything up into the right to integrate these different things to to create groundbreaking capabilities so the Kosmos program was the first one of this last nail this most recent wave of heterogeneous integration and kinda that different things were explored kind of buried in here about doing this monolithic Aliso building heterogeneous devices as you make them or printing them epitaxial printing we're they're all demonstrated and also a triplet approach with just can sort of conventionally you know chips on a substrate it's easier to envision that was explored as well and turned out that that was really the best approach identified in cosmos the other ones had yield issues if you're doing these wafer processing things steps and it doesn't work then you lose it's just the yield just did not work very well so that's why you know a goal of this or outcome of this was identifying this triplet approach as the way to to get the most general-purpose high yielding heterogeneous integration approach so the program that followed that was called dahi I suppose I should have spelled that out here diverse accessible heterogeneous integration is the name of it again government acronyms so this is where silicon CMOS silicon serves the substrate so I was like you know silicon interpose we're all familiar with this is active silicon though so you can integrate nitride devices silicon devices indium phosphide devices so with CMOS as the actual device CMOS device great CMOS is the substrate you can integrate these different devices and and create you know really impressive designs with the the designers from the defense community there's this sequence of multi project wafers MPW and the die that's what all these are the along the bottom there in the da he program increasingly sophisticated designs and larger sized substrates and and even progress in terms of the technology it started at a hundred thirteen anima animators CMOS and the first one and most reason was at forty five nanometers still not leading edge but still serves a lot of a lot of needs in the defense community so that's that's what that's the path of this dahi program pursued so just a little bit more info on it these are actual three hundred millimeter wafers from Global Foundries 45 nanometer node a whole range of devices on the on this here and each kind of neighborhood there belongs to one of the design teams on the dahi program there's Northrop Grumman Rockwell Collins Teledyne that's four or five different companies bae systems had had test designs on here and you can see it's kind of interesting picture the dark do eyes that's the back of indium phosphide that's face to face for the silicon device for the best performance face up as gallium nitride for a better thermal contact on the higher power devices so it's a lot goes into this and then there's a few examples of some of the circuits that were that were made with this and with performance that would not possible any other way just one example here actually have a couple examples but this is this is bae systems demo here it could hold you know range of devices on the indium knight indium phosphide gallium nitride silicon CMOS and by this metric here their program was reached unprecedented levels there here's a similar example this was northrop grumman there's a design work on dahi where it was a dual band frequency synthesizer meaning you could swap in a different chip --let to make it instead of 30 60 gigahertz 72 gigahertz so that that shows the modularity because everything else is the same you just put in a different piece and then you'd double the frequency at which it functions so that's kind of a good example of how you can mix and match and swap in different parts there's kind of a summary of all the stuff that going in here so there's CMOS of different nodes a few different flavors indium phosphide a few different flavors you know progress progression of gallium nitride over the years gallium arsenide was added passive components were added base substrate silicon interposer with vias through it has also been demonstrated in some of the more recent works so there's a kind of a whole toolbox of technologies available for this approach so then this just kind of shows the dahi program also included some other approaches just to explore and understand more I'll just go through those that actually dot he also led to the chips program that's underway right now that you might be familiar with know talked about shortly so some of the other things that went on daki is metal embedded chip assembly HRO developed it's a lot like fan-out wafer level fan-out you have chips pick them off the wafers and integrate them reconstituted wafers in this case they're embedded in metal which creates some thermal mechanical challenges but also solves a thermal problem by actually has a very good way for heat to get out of these higher power devices but it's interesting that leverages some industry infrastructure to do this type of approach that was another I think pursued in dahi here's a wafer bonding approach with indium phosphide on silicon and this gave some really good results but it did sort of confirm that it's difficult to use this for a general purpose heterogeneous integration approach it's just the processing the wafers at least at this point it's not not quite as flexible some other approaches but when when you can do this it's some can be some pretty impressive results and then even there's this micro transfer printing technology maybe you've seen this where you can pick really tiny devices off of wafers with this stamp and then you know use that as your mechanism for transferring devices to a to another substrate so it's a kind of a nifty way to do this you need to design for it so it's again not as universally applicable it works best with small devices or applications in the LED world for example with this so that's another another approach that was interesting the dahi program just some more results on that so that's what's gone on the past now though as I mentioned the dahi program is led led to the chips there's a lot of avenues that could have been pursued to follow up on the docket program and what DARPA really saw is making sense as you know how do we make this function more like how the silicon industry functions with IP reuse and modularity and standard interfaces and things like that because the this dahi work you know as impressive as it was it still felt like an engineering project every time we're doing a different design so chips wanted to address some of those issues okay the key concept behind it standards and modularity if you don't have you know standard interfaces where different devices it's known what you're designing into then everything is an engineering project and modularity is also a critical capability for heterogeneous integration and if you look over the history the print circuit board and that's been the default heterogeneous integration platform for many decades was actually embedded in 30s and really took off during World War two actually the proximity fuze was the first high-volume use of printed circuit boards so whenever the DoD can point to do indeed DoD investment paying off we like to do that so here's kind of this timeline of you know the printed circuit board industry over the decades has been a good industry but it really does is enables other applications so the gradual rise of printed circuit and that related technology allows these hockey sticks of these different products of smartphones and computers over the years and whatever so that's it's an enabler so that's that's the vision behind chips as well having a approach that uses standards and modularity to meant to hope other things take off it's not quite so easy though you know modularity is already in place you know and system on chips is IP you know arm is a great example all these companies that provide different blocks IP blocks integrate on a system on chip and you can mix and match but it has to be done at the monolithic level so you're still not taking advantage of different silicon technologies for different functions and you're kind of stuck with using the the one that has the captures the most capabilities even if a lot of the area on a chip doesn't need it so it's not an efficient way to go about it but still the IP model has grown over the years I mean that's you know it's used more and more every time Apple comes out with a new phone which like they just did this is a few generations behind here but you'll find diagrams good mapping out the different parts of what's doing what in the Apple processor so the modularity concept that's been shown but only it's still it's monolithic integration but you know it's prohibitively expensive to do these systems on chip unless you are Apple or Samsung or a small number of companies that can do that it's kind of interesting tidbit here the fab cost for commercial electronics is amortized you know you cover that in one day's worth of iPhones but the fab costs for a DOD chip that goes on the Joint Strike Fighter there it's it's the whole lifetime build of it you need to pay for the masks and fab time and all that so it's it's the way it advanced silicon is made as a mismatch for the DoD needs so you know it's hard for the DoD to keep up with the most advanced silicon technology but conventional assembly and the packaging world hasn't hasn't progressed very well these are numbers from the ITRs showing the you know the scale of all these different technologies and you can see it's a log scale the left there the silicon the lower half they're advancing pretty rapidly you know order of magnitude every you know a few years or so packaging notes um you know barely sloping downwards at all there's very slow progress in these things so you know packaging and assembly that's great you're very flexible for heterogeneous integration you can do quick turnarounds on things but you don't get performance or fine pitch so what you really want is the you know the best of both worlds there so how do you do that before I go into that I didn't look at these ITRs numbers and interesting like that the projections always just kind of pushed out like like in the upper left there they got pushed up like they're predicting coarser pitch but that was because of cost reduction shift from gold wire bond to copper these other things just get kind of pushed out to the right people this is not worth it the cost needed to do that so these roadmaps to be taken with a grain of salt but it's interesting historical data there anyway so a heterogeneous integration bridging that gap in packaging packaging technologies and wafer level technologies and this is just kind of a scatter plot kind of thing showing the all these different approaches and yeah obviously there's many ways that the package level to put things together system and packaged die stacking and open you know over here there's a lot of wait for level technologies as well you know 3d NAND and you know stacked memory things like this it's weight for bonding technologies face to face but it's it's that middle ground where it's a it gets tricky to bridge this gap and that's you know these inter poser technologies so serving a pretty good job of doing that using silicon processing scale interconnect to do something it's like a job for packaging so that's not not so simple it's kits complicated if you look at some of the different ways to integrate things whether it's purely monolithic you know 2d or two and a half d an interposer or 3d stacking the right answer depends on the die size and the power and cost requirements performance and all that so it's not just like there's one right answer so it's complicated trade space so you need a host of solutions and people have solved this you look at you know the famous design link FPGA slices for four slices making it one FPGA to solve the yield HMC or HBM memory and and processors or and Altera intel's fpga with with parts associated with it but these are all everything is a point solution it's it solves one large companies needs it's not a general-purpose approach so that's doesn't really help the industry so that's where chips comes in as a program started about two years ago now looking where the goal is to have a library of triplets where there's commercial ones you can get off-the-shelf there's custom DOD ones that companies have a value and you can mix and match devices and create the create these systems quickly cheaply and it wait a picture it is like digit key you know you can go online you know click a few boxes and you get the parts you want and having a similar thing for triplets is what the real vision is here there's a lot of challenges there obviously how do you make sure they'll talk to each other how do you actually assemble them at the pitch needed so there's a lot to solve so here's another way to look at the opportunity the big white space as we call it to be addressed by chips so there's these very fine pitch integration technologies out there and even you know even finer but you can't do a lot of different technologies with them similarly there's all these ways to put a lot of different devices together but the the scale is not appropriate for the performance that's needed so so step one is the interface standard needed so there's a plot of different interface standards we have HBM and sergey's and different different things covers a really a huge span some are designed for longer interconnects some are designed for ultra high bandwidth so the target for chips is shown there we're looking at putting chip --let's pretty close together so it doesn't need to drive things along a distance like surtees does so it's you know on the left on the interconnect length and you need you know high with low energy per bit so there are the metrics targeted in the program so this program started a couple years ago as like all these government things it's it's a different phases so there's three phases first one it is defining the interface so that's basically done second one would be demonstrations of real modules with this whole approach and then the last phase would be doing an upgrade to one of those modules demonstrating the benefits of it interestingly the the program started with these supporting technologies of different shifflet's and assembly and things like that but modular digital systems and modular analog systems when the proposals came in they just weren't the analogue thing is kind of much trickier to do this standards don't make sense there's not as much interchangeability so that was a left as a problem for the student to be solved later so this is focused so chips focused on digital digital work so kicked off here the teams listed there on the left some teams are not in the program anymore a few have been added but that's this is how it started so it's basically people doing these system level designs you know typically aerospace companies then companies providing different triplets to the thing to the to the ecosystem and then design tools cadence and Georgia Tech there so there's some examples of is this modular approach that that people are working on there's actually one this one lucky had an interesting approach to have modularize f-35 electronics so upgrading they can be upgraded much more quickly and effectively so you're using state of the art instead of something that's decades old so that's a good example of a DoD the use of this so here's some of the kind just kind of summary some things they've been going on in the manufacturing side there's been some really fine pitch demonstrations UCLA my crops working with Northrop Grumman Intel's provided some assembly capability as well that's that's enabling some of the heterogeneous work and then all these companies in the middle here and universities Michigan is actually done a very good job of putting like a bunch of different a AI types of triplets together to to show some nifty capabilities there and then the design tools there as well just an example there you know there's many different participants here and proposing different types of triplets and it kind of a big question is what's the minimum set you need to have a critical mass that people will be willing to design into this so that's kind of a question here this is show a couple dozen triplets it covers a lot and the protocol has also done some more analysis of if you take a giant set of DoD applications what's the minimum set of chip let's you need to cover to be able to build them like that it's surprisingly small you think it might be like hundreds but it's kind of more like dozens and so this has a chance of working in a library that's actually good enough for for someone to use so that's the that's kind of big question mark over the whole thing but it's like we're making progress some examples of some of the work being done and how he mentioned there's different assembly capabilities and and UCLA is wafer level work for us with subbu is doing some interesting stuff there kind of a snippet there so a lot of the things a lot of the activities and chips were focused on the interface standards and these manufacturing approaches so a few different you say research vectors here interposers a very accurate placement and find pitch bonding and the interface standard the other one the key key thing Intel's part of the program and they've stepped up and provided their advanced interface bus AI B as the interface standard for chips purposes there's a chips interface based on AI B and all the licensing and all that has been worked out that's always an issue so that's what we're going with it's a parallel rather than serial and high bandwidth would realize on fine pitch interconnect which is driving some of those manufacturer issues we just mentioned so that's that's some good progress there and intel has has promoted that as well so kind of the vision of chips tears that Ethernet for chips things just kind of plug together you don't even think about it so never be quite that simple probably but that's we can head in that direction so chips those also part of this MTS Electronics resurgence initiative which is a very large investment in many different programs they've been big events last summer and then in just a couple months ago as well and that's if you want to get a good view of what's going on at DARPA that's a good resource as many presentations link to from there so so that's a worth knowing about so it's as big investment and it's about 1.5 billion dollars over five years so about 300 million per year for 2018-19 and so on and it's covering a lot of a lot of areas materials architectures designs and it's all kind of based on you know it's been branded as page three of Moore's Moore's paper where you know once you get past the well-known Moore's law you know the heterogeneous integration part of it and there's different things you can see its architecture design and materials and integration so that's how these programs have been been organized so there's zip over a few of these but this 3d system-on-chip that's a different you know it's actual processing of these novel devices together you can see the resistive Ram carbon nanotube that's on top of silicon a lot of interesting work being done there MIT Stanford a few other people there you can see it's as I go through these you through these you'll see that everything is still based on this heterogeneous integration chips approach at the bottom so all this hinders on and the heterogeneous integration these different devices can come together on this certain platform the design thrust craft is a program that gives access to advanced node silicon for for these government uses there's a couple other programs called idea and posh is another one which automates some of the designs and it requires heterogeneous integration technology to make make it all work and then architecture is just designing just looking at the structuring your solutions in different ways few different programs here because the if you look at like AI applications if you're solving like a sparse matrix or dense matrix there's different types of datasets that you need to turn through and different type of architectures address that differently again requires different types of devices to do that so that's where the heterogeneous integration comes in again so happy to point out that it's still the same base for everything else the heterogeneous integration even though these different application programs village security various things on machine learning imaging rely on heterogeneous integration as well interesting one here SIF program is developing technology for secure voting which is significant interest these days perhaps outside the government more than inside and then most recently july 2019 just recently there's actually a new director at MTO and they presented his new vision and kind of a new twist on this is we've done a lot of heterogeneous integration but he is saying specifically 3d heterogeneous integration so that's the 3d SOC program there's a program called pipes which adds photonics to the equation so there's a lot going on and it's a lot based on heterogeneous integration even up here specially putting these specialized functions together for all these programs it's the chips had a heterogeneous integration platform so that's kind of what's going on now and some thoughts on the future here so this is stuff that you all look familiar to packaging experts in the room this is not even the latest and greatest it's you know a generation or two old in some cases so there's you know the inner poseur approach and the system and package ases magic they're putting all that together TSMC now the 800-pound gorilla in packaging has their own approaches so this is just amazing technologies out there and as I mentioned when a while ago now none of this is available to the DoD whether it's for security reasons because it's from overseas or you know these high value manufacturers won't return the government's call because it's not worth it today it's you know the volumes and headaches of dealing with the government just not part of their business models the fundamental mismatch there so how does the government get to use advanced interposers and system and package technology and fan-out in all this that's the current conundrum and it's broadly realized in the in the government there's a lot of focus and activity related to packaging and just tell putting my Jim Walker hat here for a minute if you look at you know sad headlines I've called it here is an awful lot of activity at Chinese packaging firms especially I was with stats chip back during the early days of the acquisition by je set and so there's kind of interesting to to see it from that end but that's the kind of thing Chinese company acquiring leading-edge technology that's that's an issue that does that mean then that the Chinese equivalent to the department defense has better technology than the US maybe that's not a good thing from the government's point of view and there's you know a whole range of things going on here where where you know China and other countries have capable capability available that's beyond what the u.s. DoD has access to I particularly like the you know the patent portfolio no stats chip back focused on that quite a bit and with je sets acquisition is quite complementary to je sets previous business and that's not quite a powerhouse so a lot going on there that's getting attention of the US government and it's kind of taking a different you know another step up the four of the top ten OMS are Chinese and they're the top growing you know among the top growing ones there you have sort of opposite trends in in the foundry world you know smick starting mass production of more advanced technology those questions of where that technology is from but that's a different issue in the meantime Global Foundries is stopping advanced node development and focusing or or specialty type of work that fills other needs so that's you know probably not the trend that the government likes to see similarly you look at you wafer fab closures you know North America Japan where a lot of the quote there are a lot of capabilities shutting down and even just looking at you know Japan's internal production the other really investing huge amounts in having their own homegrown capability for the whole supply chain and technical capabilities for packaging and even you know here compound semiconductors you think of that is not really part of this whole mix but you know more and more that those are coming from foreign sources and ending up in u.s. DoD type of type of system so that's that's what the government worries about these days it's even to the point this is a famous slide at government events shows Joint Strike Fighter components you can't not have an international supply chain for all this stuff that goes into something like that and it's pieces are going all over the world you just can't do it any differently just the materials for you know substrates where the designers are it's just you can't can't control that and if you zoom in on just the packaging part of it it's kind of like a fractal thing you zoom in it's just as complicated there's a really good diagram from this white paper about HBM design Hynix Amcorp silicon that the number of different entities involved and put it together this processor plus HBM stack is when you add it all up it's an awful lot of bodies you know touching your parts here with input on the design the fabrication and you just cannot control all of this you can't say oh this has to be done in the US or whatever you you don't even know you when you get a package substrate design you that's you know farmed out across the globe to India then romaine and somewhere else to do it to design it around the clock and you can't control that so since you can't control every step of this this type of process you need you know there's trusted resources you can use but you need a way to verify all this all the activity going on you can't just count on having sources you know for all these different steps it also the kind of security front you know what what are we actually talking about here so there's these you know the top few here you like actual people doing a malicious work a lot of it's just people trying to make money by counterfeiting devices or we're producing or you know mark marking them wrong that kind of stuff people just trying to make money but yeah when it comes down to it even if someone is just trying to make an extra dollar buy something you know overpricing apart it's still a national security issue if parts are not performing as they're supposed to so that's you know we have to deal with a whole range here not just like the malicious malicious things going on and you know this was probably most of us probably saw this story where super microserver boards had malicious components inserted into them it's still not clear there's people denying this happened and I don't know but it's totally plausible and it just kind of shows that you just you just can't count on the stuff you need to really pay attention to all the entities involved in your manufacturing so this is just Booz Allen pitched for tools that discuss all these risks and quantify that so with these security issues going on it's kind of interesting chart here if you look at DARPA program managers it was a lot hype this is in chronological order here there's a lot more activity related to packaging and security than then there has been so that's a definitely an area of interest this is all public info it's actually kind of interesting to track like photonics kind of goes in and out of favor at these agencies or quantum computing and things like that so it's interesting to track the topics that these come with these program managers cover as they come in this is one interesting DARPA program a hardware based security this called shield program or this tiny tiny dial it 100 microns square you kind of you know ping it and it answers so you can embed this in devices and track things around so there's that's kind of one of the interesting DARPA programs related to security this larger program min SEC it's hundreds of millions if not more pretty high level in the Secretary of Defense office of the secretary defense addressing this issue that access to leading-edge technology how do you even do this there's so many threats out there how what verification technologies do you need and if you look you squint hard enough at these government images you can see how important the packaging piece of this is these threats are concentrated in packaging I think so many different entities are involved in it and it's not in kind of lower tech activity just harder to keep track of what's going on so that's that's where the threats are located and the way they show it you know we're packaging a test happens that's where all the pieces come together that's an opportunity to have a lot of security in place to guarantee you know to assure your products for the DoD so that's interesting program underway I lose a lot of different programs under it so it's kind of an umbrella effort [Music] the part of is a trusted foundry program trusted resources and DME a is an agency in Sacramento defense microelectronics activity certifies assortment of places as being a trusted resource that's physical and cybersecurity things in place and a lot of a lot of this list is these the ones that are certified for packaging and assembly a lot of them are captive you know its BAE and Northrop and companies like that the other ones tend to be you know it's not too many independent ones with advanced technology so and it's just kind of not really serving the industry as well as it could so if there's some limits of this trusted foundry approach and that's been noticed recently Lisa Porter who's the deputy undersecretary of Defense or search and engineering that's what that acronym all that is gave a talk of the ERI summit in July and it was really kind of a groundbreaking for someone in the Secretary of Defense office to say you know we can't count on making anything securely you have to assume it's not secure and deal with it so it's a zero trust model you can't trust things being being made so you need to well who has access to it what are they doing you know what do we need to keep track of so it's a very data-driven approach where you're keeping track of the whole process flow much better yeah verification in line at different points rather than having some place where you think you can make things that you can trust so that's this actually the video of this is on YouTube worth checking out I'd say Lisa Porter is the name type of Lisa Porter the supporter ERI or something like that I'll show up but she's a data not perimeters must be the arbiter of the trust that we assigned it electronics that we build so you can't say well it came from here so it's fine you just can't do that you have to you know be smarter about it and so that's a kind of a new directness so yeah we could have trusted facilities in place but that you can't just count on that so we need a lot of data collection and analysis you have to apply to the whole supply chain so it's very data driven much more kind of in line with you know industry you know where you have there's so much data that you can spot things you know funny thing is going on so that's that's kind of the vision here so that's how a lot of things are moving ahead so ok the most concrete piece of that there's this ship program state-of-the-art heterogeneous integrated packaging opportunity it's sponsored by the Navy they came up with the acronym ship someone's very clever working over time there but it's a very large effort to put in place interposer based assembly capability so it's designed assembly and test and here's just some of the verbiage from its digital it's RF so there's two halves of it and they each then has a design and assembly piece as well so phase one proposals were just do about a month ago I think the winners will be announced quite soon they might even know themselves already but you know if you read the fine print on this they're looking at 25 million dollars for a six-month paper study which is government rates something like a hundred people working full-time and to spend money that fast on paper only with no tape outs or anything that's not easy so this is a huge effort underway and follow me that will be you know probably more digits millions of dollars to put this capability in place that's what I was saying earlier just does not exist yeah Global Foundries makes inter posters but you're not buying their silicon they don't want to do interposers for you so there's capabilities but it just doesn't work for the government business model so that's this is one large program to address a big slice of that Bretton Hamilton at the Naval Surface Warfare Center is the guy leading this so that's a navy effort AFRL there's a lot of work as well this area so it just kind of some more commentary and what's what's really needed here is to have this capability in place so that the idea is access to it and they do want to have it be like for real high volume style manufacturing with process design kits and you know there's a whole whole slew of everything that's needed not just sort of a job shop kind of place they wanted to be self-sustaining so it needs to be set up such that it serves enough government customers the defense industrial base academia is another low volume customer and even its commercial companies when appropriate so that's it's not something that government's going to keep funding for Pech waves and that's another shift and how the government sees this here's its kind of the best snapshot of what they're looking to do so within the secure boundary design engineering validation assembly in tests and you get inputs from the customers you have your whole supply chain you need to know how to deal with them in a secure way that's where this data all this data analysis ties in here so it's a this is you know nothing too shocking here but to have it in place at a scale that works for the government needed they give a few examples here just kind of the canonical examples of digital FPGA plus things around it rather than a giant you know foot square board like that on the RF side this is so much of some of the stuff I showed earlier than cosmos programs putting together these different pieces for you know RF capabilities well there's kind of two examples this show more of that and some of the specs shown is they're not really breaking any ground the technology and with the number chip so how close they are or anything like that it's it's just having this so it works for the government similarly you know pitches you know the some advanced here but nothing is not being done in the advanced commercial world these specs are all available from the solicitation of mine so so that's have no idea how I'm doing on time here IRA but that's what I had to show on the past present and future of heterogeneous integration the government so a lot has gone on a lot is continuing to go on and that is recognized by the government as critical critical area critical enabler for for what the Defense Department offense needs to do so with that I'd be happy to answer questions and see microphone there [Applause] you